AMD today unveiled their new Ryzen 5000 mobile line of CPUs (mostly) based on the Zen 3 core. AMD teased the important pieces weeks ago, so SemiAccurate just gives you a bunch of interesting details.
The main components of AMD’s Ryzen 5000 mobile / APU (R5KM) are known because they are already available in different forms. Zen 3 cores are in the Ryzen 5000 non-mobile line on the CCD chiplet in the CPUs on the market. In APU form, there are some differences, especially that the core complex is a unified 16MB L3 cache instead of 2x4MB in the Zen 2 models, both half the cache of their server / HEDT brothers.
Half the cabinet, all the cores
Note bottom right
Things do get interesting if you dive a little deeper under the hood. If you look at the U series in the table above, you will see that three of the five, 5700U, 5500U and 5300U, are all based on Zen 2, rather than on the expected Zen 3 core. That means half the closet, the old core architecture, and more. Fortunately for AMD, these cores are pretty good, leading the way in most ways, so their inclusion, or at least not Zen 3-based SoCs for those parts, is not the end of the world.
Mandatory beautiful death shot
So why are you doing this? Why should you fall back, especially since the rest of the SoC is exactly the same as Zen 3 parts? Money, or at least cost that seems a bit counter-intuitive, as AMD has to design, paste and confirm a second dice for just three SKUs. The answer lies at the bottom of the picture above, the section that reads 180mm and 10.7B transistors. The Zen 2 SKUs are on the same process, but take up 156mm and 9.8B transistors, about a 10% saving in surface area. Most of this is offset by 8MB less L3 cache, but the cores are also a bit smaller.
Buy these versions
AMD claims that the OEMs were very price sensitive and that the margin is so important for Zen 2. As AMD is currently very capacity bound, a 10% saving on the area for SKUs with a higher volume is also welcome. AMD says they will place a holographic sticker on all Zen 3 models to distinguish them, something that SemiAccurate welcomes. The game-oriented SoCs, basically the 35/45/45 + W models, will all be based on Zen 3.
Mandatory block diagram
One very interesting detail is the CCX <-> Infinity Fabric connection. You can remember in the larger / non-APU Ryzen desktop components that the CCD chipsets are paired with the IOD chiplet with a 32b-wide read, 16b-wide write per cycle bus. On the APUs, it is increased to 32b / 32b R / W for both the Zen 2 and Zen 3 based SoCs. The 2x4C layout does not affect the connections to the fabric. You can probably win bets on a bar with this, we do not ask a percentage if you do.
On the memory side, the R5KM line adds two features, power saving and LPDDR4x. The power saving is based on a deep power state for the memory controller and AMD claims that it will have lower activity and come out ‘fast’. During this condition, the PHYs are placed on a lower voltage track and therefore consume less energy. This is the table interest for the use of LPDDR4x, which is now supported with 4266 MTps speeds. Even better, you can buy chips that are double the density of vanilla DDR4, so hopefully we see laptops with increased capacity instead of one channel with the same capacity to save a few cents.
This is the big bang on energy consumption
Speaking of lower power, AMD has now enabled CPPC or Collaborative Processor Performance Control on R5KM. This closed loop power saving methodology has been with us in desktop form for several generations, but it is the first implementation (Activation?) In mobile devices. While interesting on its own, the coupling of CPPC with the per-core voltage regulation via DLDOs, as you can see above, is far more valuable than both options. The GPU is also at its own voltage level, but now the whole system is not connected to the state as in R4KM. This should result in significant energy savings.
The rest of the SoC is about the same as the R4K line, the only real addition that SemiAccurate can find is Control-Flow Enforcement Technology (CET) on the Zen 3 core models. There are adjustments to the GPU to slow down the attenuation in situations like bandwidth like the Radeon 6000, something that may be linked to the new awareness of the memory controller. Anyway, the rest of the system is about like the R4KM was, PCIe3, the same IO and all the others. This is not bad, but PCIe3 is getting grumpy, Intel will destroy that this component is storage standards, and that performance is important to the author.
The up front is that R5KM is pin compatible with R4KM, all the power supplies are running so they ‘just work’ even in transfer designs. This should mean a faster introduction of new models, something we are already seeing in the market, and savings for the OEMs that can extend the life of their reduced engineering costs for those models. If you want to take the optimistic view, you can say that the money that would have been used to redo the boards can now be used to make special devices such as custom game chassis and other related things. So far, the R5K is starting well.S | A
